Phase detector
Phase detectors are used in many systems such as phase lock loops, delay lock loops and clock and data recovery circuits. Phase locked loops (PLL's) and delay locked loops (DLL's) are widely used circuits where it is necessary to have two signals which have a known relationship to one another. A PLL is a circuit that causes a particular system to track with another system. Communications systems and computer systems have components that operate at different frequencies. Typically, these systems use Phase-Locked Loops (PLLs) for synchronization of their components. A phase detector may be used in conjunction with a phase locked loop (PLL) or a delay locked loop (DLL) to control the sampling of the data in the receiving domain. The phase detector is used to acquire the phase relationship between the receiving clock and the data. The phase detector is used to provide phase discrimination and generate a control signal which is then used to speed up or slow down the local signal so that a desired relationship between the local signal and the reference signal is obtained. PLLs are widely used for clock generation in data communication systems, local area networks, data storage applications, disc drives, and microprocessors. A typical PLL includes three main building blocks: a phase detector, a loop filter and a voltage (or current) controlled oscillator. The phase detector receives the reference or input signal as well as the output of the voltage controlled oscillator. The phase detector measures the phase difference between the input signal and the output signal of the voltage controlled oscillator. The phase difference acts as an error signal that is fed to the voltage controlled oscillator via the loop filter. Phase detectors may either be a linear or nonlinear detector. The linear detector produces an output that is ideally proportional to the phase difference between the two input signals to the phase detector. In contrast, a nonlinear or digital phase detector produces an output that simply indicates whether one input is leading the other input. Analog phase detectors commonly employ a capacitor to hold and accumulate charge proportional to the phase difference between the clock and the data. However, high precision capacitors are difficult to manufacture and must be constantly charged and discharged to function properly. Digital phase detectors are widely used to compare the respective phases of two input signals. By comparing a reference signal, such as a clock signal, to a feedback signal using a digital phase detector, phase adjustments may be made to one or both of the input signals based on the comparison of the input signals, in order to synchronize the signals.
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