Dynamic random access memory (DRAM)
Memory devices are used in a wide variety of applications, including computer systems. Computer systems and other electronic devices containing a microprocessor typically include system memory, which is generally implemented using dynamic random access memory (DRAM). A dynamic random access memory (DRAM) cell typically includes a memory cell coupled to a storage capacitor. A dynamic random access memory includes a large number of memory cells, each of which can store at least one bit of data. The memory cells are arranged in an array having a number of rows and columns. The memory cells of dynamic random access memories (DRAMs) include two main components, a field-effect transistor (FET) and a capacitor which functions as a storage element. The cells in the array are typically arranged in rows and columns. Each cell is situated at the intersection of a row and a column. Each cell in the DRAM array may be accessed by simultaneously addressing the intersecting row and column. The storage capacitor is formed within a deep trench etched into a semiconductor substrate. The storage capacitor is accessed using an access transistor which allows charge to be stored in the storage capacitor or retrieves charge from the storage capacitor depending on whether the desired action is a read or write function. Dynamic random access memories (DRAMs) may have memory precharge, activate, read, and write operations. The primary advantage of DRAM is that it uses relatively few components to store each bit of data, and is thus relatively inexpensive to provide relatively high capacity system memory. A disadvantage of DRAM is that their memory cells must be periodically refreshed.
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