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Field effect transistor
Friday, 20 October 2006

Transistors are the basic building block of electronic devices. Among transistors, field effect transistors (FET) such as CMOS transistors are widely used in the electronics industry. For several ten years, the field effect transistor has been significantly developed in the application of semiconductor device. Due to its low-power dissipation and highly integrated technique, it plays the most important role in the field of very-large-scale integration (VLSI), particularly in ultra-large-scale integration (ULSI). Integrated circuits comprise a large number of individual circuit elements, such as transistors, capacitors and resistors. These elements are internally connected to form complex circuits, such as memory devices, logic devices and microprocessors. Improving the performance of integrated circuits requires reducing feature sizes. The dimensions of modem integrated circuits are steadily shrinking, while at the same time providing both improved device performance and circuit density. Correspondently, reducing the size of circuit elements require reducing the size of field effect transistors. A reduction in size of transistor is an important aspect in steadily improving device performance of complex integrated circuits, as the reduction in size commonly brings about an increased switching speed, thereby enhancing signal processing performance and also power consumption. Field effect transistors have been known for a number of years as the transistor of choice for use in complex integrated digital circuit. Semiconductor devices, such as complementary metal oxide semiconductor (CMOS) integrated circuits, generally include field effect transistors (FETs) which are disposed in a single plane of a semiconductor substrate. 

A field effect transistor is a semiconductor component with three terminals which are referred to as the gate, source and drain. Field effect transistors may be formed in conventional substrates (such as a silicon substrate), or in silicon-on-insulator (SOI) substrates for example. Field effect transistors have a gate, a source and a drain. A field effect transistor includes a pair of source/drain regions having a channel region received therebetween. A conductive gate of the transistor is received transverse the channel region, and separated therefrom by a gate dielectric region. The flow of current through the channel between the source/drain regions is controlled by the application of a potential to the transistor gate. In a field effect transistor, the output current is controlled by manipulating a voltage applied to a gate electrode. The conductivity of the drain-source path is influenced with a control voltage applied to the gate, during which process no control current flows so that the control is carried out without any consumption of power. A voltage applied across the gate and the substrate of the transistor causes an electric field to permeate a channel region between the source and the drain. The electric field controls current flowing through and voltage across the source and the drain. By means of the control voltage applied to the gate which is insulated from the drain-source path by means of an insulation layer, the charge carrier density is determined in the inversion layer which is located underneath the gate and forms a conductive channel between the drain and the source, thus permitting current flow. A thin film field effect transistor typically consists of source and drain electrodes interconnected by semiconductor material. Conduction between the drain and source electrodes occurs basically within the semiconductor and the length between the source and drain is the conduction channel. In silicon-on-insulator substrates, active devices such as field effect transistors are formed in a relatively thin single-crystal semiconductor layer overlying a buried layer of insulating material such as a buried oxide (BOX) layer.

There are many kinds of field effect transistor design, such as a metal-insulator-semiconductor (MOSFET), an insulator-gate FET (IGFET), a junction-gate FET (JFET) using reversely biased p-n junction as a gate, a metal-semiconductor FET (MOSFET) using the metal-semiconductor schottky contact as a gate, and a modulation-doped FET (MOSFET), in which the main differences are in the gate and channel structures. Generally, FET devices can be classified as either junction field effect transistor (JFET) or metal oxide semiconductor field effect transistor (MOSFET). Junction field effect transistors (JFET) are majority carrier devices that conduct current through a channel that is controlled by the application of a voltage to a p-n junction. A junction field-effect transistor has a pn junction provided on either side of a channel region where carriers are passed therethrough, and a reverse bias voltage is applied from a gate electrode to extend a depletion layer from the pn junction into the channel region to control the conductance of the channel region and carry out such an operation as switching. A junction field effect transistor (JFET) applies a reverse bias voltage from a gate electrode to a p-n junction provided on a side portion of a channel region passing carriers therethrough, thereby spreading a depletion layer from the p-n junction to the channel region and controlling the conductance of the channel region for performing operation such as switching. JFETs may be constructed as p-channel or n-channel and may be operated as enhancement mode devices or depletion mode devices. A JFET having a semiconductor substrate of SiC usually has a channel region which is an n-type impurity region. The most common JFET transistor is the depletion mode type. The depletion mode device is a normally "on" device that is turned off by reverse biasing the p-n junction so that pinch-off occurs in the conduction channel. Metal oxide semiconductor field effect transistors employ a double pn-junction structure as a base structure, the pn-junction structure having a linear property at a low drain voltage. Currently, a majority of circuits and memory chips are fabricated using metal-oxide semiconductor field effect transistor (MOSFET) technology.

A metal oxide semiconductor field effect transistor (MOSFET) includes an insulated gate having one or more gate conductor layers overlying a gate dielectric layer, over a substrate of single crystal semiconductor. The gate conductor usually includes a layer of polysilicon material, and the gate dielectric layer is often composed of an oxide such as silicon dioxide when the substrate is silicon. A MOSFET has two pn junction structures showing linear characteristics at a low drain voltage as a basic structure. Typical MOSFETs include source/drain diffusion regions which are disposed within a substrate and a conductive gate which overlies a channel region intermediate the source/drain diffusion regions. There are a number of different types of MOSFETs such as NMOS and PMOS field effect transistors. NMOS field effect transistors are typically formed on a p-type substrate or p-well. The channel in an NMOS transistor is usually formed through provision of a positive gate voltage on the transistor which attracts minority electrons within the p-type substrate into the channel region. PMOS field effect transistors are typically formed on an n-type substrate or n-well. The channel in PMOS transistors is typically formed through provision of a negative gate voltage on the transistor gate which attracts minority holes from the n-type substrate into the channel region to form the channel. CMOS (complementary metal oxide semiconductor) devices utilize both NMOS and PMOS transistors. In a conventional metal oxide semiconductor field effect transistor (MOSFET) the gate is electrically isolated from the channel by an insulating layer of oxide. This creates the advantage of allowing the source and drain voltage to be controlled by a voltage applied across the gate and transistor substrate without any current flowing through the gate. Hence, significant power savings are attainable compared to bipolar junction transistors. Metal oxide semiconductor field effect transistors are fabricated on a silicon substrate by using doping to form source and drain regions separated by the channel region. A gate insulation layer of silicon oxide is formed on the surface of the channel region, on top of which a gate electrode (of polysilicon doped to decrease the sheet resistance or of a metal such as molybdenum) is formed to apply the electric field.

The field effect transistor which has a high impedance and consumes a very small amount of electric power, is widely used as a switching element for a computer and an electric power control element. Field effect transistors are employed in almost every electronic circuit application, such as signal processing, computing, and wireless communications. A floating gate field effect transistor serves as a non-volatile semiconductor memory device which is capable of electrically erasing and programming informations. The floating gate field effect transistor has recently be used as the flash electrically erasable programmable read only memory. Among transistors, metal oxide semiconductor field effect transistors (MOSFETs) have currently become the leading choice of designers as ultra-small size and high speed switching transistors. Metal oxide semiconductor field effect transistors have been widely used as micro and super-speed switching transistors. Field-effect transistors of the MOS type are currently the principal active vehicle in very-large-scale integrated (VLSI) circuits, particularly in CMOS circuit implementations. Metal oxide semiconductor field effect transistor has lower temperature formation of the metal-semiconductor barrier, low resistance along the channel width and good heat dissipation for power devices. MOSFETs are used in particular as an active component in highly integrated silicon-based circuits because field-effect transistors can be fabricated very easily and in a very space-saving way.